july 2010 ?2010 fairchild semiconductor corporation FDME1024NZT rev.c1 FDME1024NZT dual n-channel powertrench ? mosfet www.fairchildsemi.com 1 FDME1024NZT dual n-channel powertrench ? mosfet 20 v, 3.8 a, 66 m features ? max r ds(on) = 66 m at v gs = 4.5 v, i d = 3.4 a ? max r ds(on) = 86 m at v gs = 2.5 v, i d = 2.9 a ? max r ds(on) = 113 m at v gs = 1.8 v, i d = 2.5 a ? max r ds(on) = 160 m at v gs = 1.5 v, i d = 2.1 a ? low profile: 0.55 mm maximum in the new package microfet 1.6x1.6 thin ? free from halogenated compounds and antimony oxides ? hbm esd protection level > 1600 v (note 3) ? rohs compliant general description this device is designed specifically as a single package solution for dual switching requirement in cellular handset and other ultra-portable applications. it features two independent n-channel mosfets with low on-state resistance for minimum conduction losses. the microfet 1.6x1.6 thin package offers exceptional thermal performance for it's physical size and is well suited to switching and linear mode applications. applications ? baseband switch ? load switch mosfet maximum ratings t a = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 20 v v gs gate to source voltage 8 v i d drain current -continuous t a = 25 c (note 1a) 3.8 a -pulsed 6 p d power dissipation for single operation t a = 25 c (note 1a) 1.4 w power dissipation for single operation t a = 25 c (note 1b) 0.6 t j , t stg operating and storage junction temperature range -55 to +150 c r ja thermal resistance, junction to ambient (single op eration) (note 1a) 90 c/w r ja thermal resistance, junction to ambient (single op eration) (note 1b) 195 device marking device package reel size tape width quantity 4t FDME1024NZT microfet 1.6x1.6 thin 7 ?? 8 mm 5000 units g2 s1 g1 d2 s2 d1 microfet 1.6x1.6 thin d1 d2 bottom pin 1 top
FDME1024NZT dual n-channel powertrench ? mosfet www.fairchildsemi.com 2 FDME1024NZT rev.c1 electrical characteristics t j = 25 c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0 v 20 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25 c 16 mv/ c i dss zero gate voltage drain current v ds = 16 v, v gs = 0 v 1 p a i gss gate to source leakage current v gs = 8 v, v ds = 0 v 10 p a on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 0.4 0.7 1.0 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25 c -3 mv/ c r ds(on) static drain to source on resistance v gs = 4.5 v, i d = 3.4 a 55 66 m : v gs = 2.5 v, i d = 2.9 a 68 86 v gs = 1.8 v, i d = 2.5 a 85 113 v gs = 1.5 v, i d = 2.1 a 106 160 v gs = 4.5 v, i d = 3.4 a, t j = 125 c 76 112 g fs forward transconductance v dd = 4.5 v, i d = 3.4 a 9 s dynamic characteristics c iss input capacitance v ds = 10 v, v gs = 0 v, f = 1 mhz 225 300 pf c oss output capacitance 40 55 pf c rss reverse transfer capacitance 25 40 pf switching characteristics t d(on) turn-on delay time v dd = 10 v, i d = 1 a, v gs = 4.5 v, r gen = 6 : 4.5 10 ns t r rise time 2 10 ns t d(off) turn-off delay time 15 27 ns t f fall time 1.7 10 ns q g total gate charge v dd = 10 v, i d = 3.4 a, v gs = 4.5 v 3 4.2 nc q gs gate to source gate charge 0.4 nc q gd gate to drain ?miller? charge 0.6 nc drain-source diod e characteristics v sd source to drain diode forward voltage v gs = 0 v, i s = 0.9 a (note 2) 0.7 1.2 v t rr reverse recovery time i f = 3.4 a, di/dt = 100 a/ p s 8.5 17 ns q rr reverse recovery charge 1.4 10 nc notes: 1. r t ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2. pulse test: pulse width < 300 p s, duty cycle < 2.0%. 3. the diode connected between the gate and source serves only as protection esd. no gate overvoltage rating is implied. a. 90 c/w when mounted on a 1 in 2 pad of 2 oz copper. b. 195 c/w when mounted on a minimum pad of 2 oz copper.
FDME1024NZT dual n-channel powertrench ? mosfet www.fairchildsemi.com 3 FDME1024NZT rev.c1 typical characteristics t j = 25 c unless otherwise noted figure 1. 0.0 0.5 1.0 1.5 0 2 4 6 v gs = 1.8 v v gs = 3 v v gs = 4.5 v v gs = 1.5 v v gs = 2.5 v pulse duration = 80 p s duty cycle = 0.5% max i d , drain current (a) v ds , drain to source voltage (v) on-region characteristics figure 2. 0246 0.5 1.0 1.5 2.0 2.5 3.0 v gs = 2.5 v v gs = 3 v normalized drain to source on-resistance i d , drain current (a) v gs = 4.5 v v gs = 1.8 v v gs = 1.5 v pulse duration = 80 p s duty cycle = 0.5% max n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 3.4 a v gs = 4.5 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 50 100 150 200 250 300 t j = 125 o c i d = 3.4 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 0.0 0.5 1.0 1.5 2.0 0 2 4 6 t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDME1024NZT dual n-channel powertrench ? mosfet www.fairchildsemi.com 4 FDME1024NZT rev.c1 figure 7. 0123 0.0 1.5 3.0 4.5 i d = 3.4 a v dd = 10 v v dd = 8 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 12 v gate charge characteristics figure 8. 0.1 1 10 20 10 100 500 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.1 1 10 50 0.01 0.1 1 10 1 s 100 p s dc 100 ms 10 ms 1 ms 10 s i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 195 o c/w t a = 25 o c forward bias safe operating area figure 10. 0 3 6 9 12 15 10 -9 10 -8 10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 v gs = 0 v t j = 25 o c t j = 125 o c v gs , gate to source voltage (v) i g , gate leakage current (a) g a t e l e a k a g e c u r r e n t v s ga te to so urc e vo l ta ge figure 11. single pul se maximu m power dissipation typical characteristics t j = 25 c unless otherwise noted 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 1 10 100 p (pk) , peak transient power (w) single pulse r t ja = 195 o c/w t a = 25 o c t, pulse width (s) 0.5
FDME1024NZT dual n-channel powertrench ? mosfet www.fairchildsemi.com 5 FDME1024NZT rev.c1 figure 12. junction-to-ambient transient thermal response curve 10 -4 10 -3 10 -2 10 -1 11 0 100 1000 0.005 0.01 0.1 1 2 single pulse r t ja = 195 o c/w duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25 c unless otherwise noted
FDME1024NZT dual n-channel powertrench ? mosfet www.fairchildsemi.com 6 FDME1024NZT rev.c1 dimensional outline and pad layout
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